User Contributed MET/CAL PROCEDURE ============================================================================= INSTRUMENT: S. A. SD1201-1:Vibration Control System INSTRUMENT: S. A. SD1201-2:Vibration Control System INSTRUMENT: S. A. SD1201-3:Vibration Control System DATE: 10-Oct-97 AUTHOR: User Contributed REVISION: 0 ADJUSTMENT THRESHOLD: 70% NUMBER OF TESTS: 4 NUMBER OF LINES: 105 CONFIGURATION: Fluke 5700A CONFIGURATION: HP 34401A ============================================================================= STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON 1.001 ASK- R N P F W 1.002 ASK+ X 1.003 IEEE [@34401]*RST 1.004 HEAD INITIAL CONDITIONS 1.005 DISP Turn the UUT off before proceeding. 1.006 DISP Remove the top cover of the SD400A SYSTEM CONTROL 1.006 DISP and place A6 on an extender card. 1.007 DISP Set the UUT as follows: 1.007 DISP CONT/HALT (on processor) ...........CONT 1.007 DISP KEY LOCK ...........................ON 1.008 DISP Insert CALIBRATION SOFTWARE disk into drive. 1.009 DISP Set the CONT/HALT switch to HALT. 1.010 DISP Press and release the BOOT/INIT switch. 1.011 DISP Set the CONT/HALT switch to CONT. 1.012 DISP On the UUT system keyboard type 171020G. 1.013 DISP Follow prompts on the UUT CRT to enter 1.013 DISP the date (DD-MMM-YY). 1.013 DISP 1.013 DISP Entering a time is optional. 1.014 DISP The UUT display should now have a "dot" prompt 1.014 DISP indicating that the RT-11 operating system has been 1.014 DISP installed. 1.015 CALL SD1201 Output DC Offest Sub 1.016 CALL SD1201 Boot Sequence 1.017 CALL SD1201 Output Attenuator Sub 1.018 CALL SD1201 Output Frequency Response Sub 1.019 JMPT 1.025 S. A. SD1201-3:Vibration Control System 1.020 JMPT 1.023 S.A. SD1201-2:Vibration Control System 1.021 CALL SD1201-1 Input Amplifier DC Offset Sub 1.022 JMP 1.026 1.023 CALL SD1201-2 Input Amplifier DC Offset Sub 1.024 JMP 1.026 1.025 CALL SD1201-3 Input Amplifier DC Offset Sub 1.026 CALL SD1201 Boot Sequence 1.027 CALL SD1201 Input Amplifier Dynamic Range Sub 1.028 CALL SD1201 Input Frequency Response 1.029 CALL SD1201 Programmable Signal Processor Sub 1.030 CALL SD1201 DDR/DAC Sub 1.031 HEAD {* RMS Converter *} 1.032 JMP 2.001 1.033 EVAL 2.001 DISP Now type @RMS . 2.002 DISP The UUT will respond with ENTER UNIT #. 2.002 DISP Type 1 . 2.003 DISP Now type PANSET(25,51) . 2.004 DISP Connect the 5700 to J18. 2.005 MESS Adjust the stimulus for a reading of .1 on the 2.005 MESS SD400A TEST LEVEL display 2.006 5700 0.1000V 1.000% 1kH 2W #! Test Tol 0.001, Sys Tol 2e-005, TUR 50.000 (>= 4.00). 3.001 MESS 3.002 DISP Turn the KEY LOCK to OFF. 3.003 HEAD Mult-Point Averager 3.004 JMP 4.001 3.005 EVAL 4.001 DISP Place card A3 on an extender. 4.002 CALL SD1201 Boot Sequence 4.003 IEEE [@34401]FUNC "VOLT:DC" 4.004 IEEE [@34401]VOLT:DC RANG:AUTO ON[GTL] 4.005 DISP Connect A3TP1 to the analog ground, GND A. 4.006 DISP Connect the HP 34401A Lo to GND A and the 4.006 DISP HP 34401A HI to A3TP2. 4.007 OPBR Does the HP 34401A read 0VDC ±.05mV? 4.008 JMPT 4.010 4.009 DISP Adjust A3R2 for 0 ±.05mVdc. 4.010 DISP Remove the ground from A3TP1 and ground A3TP5. 4.011 DISP Move the DVM HI from A3TP2 to A3TP4. 4.012 OPBR Does the HP 34401A read 0VDC ±.05mV? 4.013 JMPT 4.015 4.014 DISP Adjust A3R7 for 0 ±.05mVdc. 4.015 DISP Move the DVM HI from A3TP4 to A3TP3. 4.016 OPBR Does the HP 34401A read 0VDC ±.05mV? 4.017 JMPT 4.019 4.018 DISP Adjust A3R9 for 0 ±.05mVdc. 4.019 DISP Remove all the connections from the A3 board. 4.020 DISP Type CRTL C 2 times. 4.021 DISP When the system prompt appears, turn off UUT and 4.021 DISP reinstall A3. 4.022 JMPT 4.028 S.A. SD1201-1:Vibration Controller 4.023 CALL SD1201 SRS Input Amplifier DC Offset Sub 4.024 CALL SD1201 Boot Sequence 4.025 CALL SD1201 SRS Input Amplifier Dynamic Range Sub 4.026 CALL SD1201 SRS Input Frequency Response 4.027 CALL SD1201 SRS Programmable Signal Processor Sub 4.028 END #! T.U.R.s less than 4.00: 0 #! T.U.R.s estimated using RANGE value: 0 #! T.U.R.s not calculated (ASK- U): 0 #! T.U.R.s not computable at compile time: 0 #! FOR JUSTIFICATION REFER TO COMMENTS FOLLOWING EACH TEST IN THIS LISTING.